This course focuses on the design methodologies for VLSI circuits implementing digital signal processing (DSP) algorithms across a variety of applications. It introduces architectural optimization techniques such as pipelining, retiming, unfolding, folding, and systolic arrays to enhance speed, reduce power consumption, or minimize size. Students will also learn hardware description languages (HDL) and apply them to design and implement DSP systems. Through practical sessions providing hands-on experience in VLSI-based DSP architecture design and implementation.